A long-time evangelist of 3D integration technologies, Herb Reiter puts more than 20 years of experiences in technical and business roles at semiconductor and EDA companies to work, providing a holistic perspective and insight on how to bring 3D integration to the masses.

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DATE 2015 demonstrates Europe’s commitment to Semiconductors, Part 2

Continuing from Part 1: On Thursday morning I really enjoyed the Monolithic 3D session. Francoise already reported about it, so I can be brief and focus on the most advanced program presented, the CEA Leti CoolCube™ . Olivier Billoint showed and explained how Leti, in cooperation with an EDA partner, is developing the integration of two layers of functions on a wafer. The first layer uses a reg... »

DATE 2015 demonstrates Europe’s commitment to Semiconductors

Full disclosure: I spent the first half of my life in Europe. I was born and raised in Austria, and earned my engineering and business degrees at government funded schools there. I worked more than 12 years in technical and business roles in Munich, covering all of Western Europe. If you can read some bias for Europe between the lines below, you are not mistaken. Spending the first half of March i... »

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DesignCon 2015: Blasting Through Walls with Holistic Planning

DesignCon’s 2015‘s tag-line “where the chip meets the board”, was a very appropriate message, and summarized in a few words a major trend in our semiconductor- and electronic systems industry: The increasing need for holistic planning as well as modeling of building blocks, not only for better up- and down-stream communication between design steps, but also for closer cooperation betwe... »

Why is it Taking so Long to Ramp Interposer and 3D IC Designs?

And what are we going to do about it in 2015…? A moment ago I finished reading my predictions for 2014. I wrote them on January 11, 2014, almost exactly one year ago. After convincing myself that I was roughly on target, I am going to stick my neck out again, and, hopefully, give you some food for thought. I hope you can agree with me that my previous predictions, emphasizing good prospects for... »


IEDM 2014 3D Short Course Highlights 3D Memory Cubes for SYSTEM design

Years ago, when I gave my first 3D technology presentations, I noticed very different reactions from my diverse audience: The packaging engineers were in their element, engaged right away and asked detailed technical questions. The IC designers appeared quite worried about the strange — and for them, at that time — very different new challenges. The system designers followed very attentively e... »

3D ASIP 2014: All Aboard the 3D IC Train!

Like the previous 10 years, RTI International held the 11th 3D-IC focused conference in early December. Instead of the usual two and a half days, this year it spanned 3 days, because it also offered a 4-hour session about 3D design challenges and solutions available from foundries, EDA and IP vendors, a power-user’s 3D views, as well as a low-power design tutorial presented by Si2’s Jerry Fren... »

Invitation to Participate in Si2 Survey

Dear Semiconductor / EDA expert, In my role as business development consultant, I, Herb Reiter, am getting involved in many new technologies, interesting business opportunities and meeting influential people – like 3D InCites’ Francoise von Trapp. At last week’s 3D ASIP Conference in California, Francoise offered to encourage you to answer a brief survey that will help Si2 and me, in my role... »

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IC and System Designers, This Could be the Best Four Hours Spent this Year

Don’t miss a full morning of expert presentations about 3D-IC and Interposer design tools and methodologies! Since 2004, every December RTI International has organized  a 3D technology focused conference in Burlingame, near the San Francisco Airport. Supply side industry experts presented the progress they had made in developing new manufacturing and metrology equipment, advancements in materi... »


Kahoots from the IWLPC 3D InCites Panel

Interposer designs and 3D ICs shift a significant part of the value creation to material vendors and assembly/test houses. It’s only logical that Françoise von Trapp, in her role as Queen of 3D, moderated a high-profile 3D panel this week at the International Wafer Level Packaging Conference (IWLPC), at the DoubleTree Hotel in San Jose, CA. The panelists represented a cross section of our indus... »

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TSMC’s 2014 Open Innovation Platform Ecosystem Forum

Like many years before, I had the opportunity to attend the annual TSMC Open Innovation Platform Ecosystem Forum in San Jose’s Convention Center, held this year on September 30, 2014. TSMC always has a lot of progress to report from year to year. Last week’s event was no exception and demonstrated that this large corporation has the finger on the pulse of our industry. In my eyes, the most i... »

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