Weathering The Storm and Positioning the Semiconductor Industry for Growth

Weathering The Storm and Positioning the Semiconductor Industry for Growth

2019 has been a sobering year for the semiconductor industry. It started out with such high hopes, coming off of a banner year in 2018, during which we hit some significant milestones. Now we find ourselves in the midst of the worst downturn since 2008, minus the global financial crisis, according to VLSI’s Dan Hutcheson. Everyone is waiting to see what happens with China’s tariffs. And while the recovery is coming, everyone should proceed with caution.

You all know what I’m talking about. Your companies are going into safe mode, battening down the hatches and tightening the budget. Marketing budgets are the first to feel the pinch as all “unnecessary spending” is put on hold. But if you attended last week’s International Wafer-Level Packaging Conference (IWLCP 2019), which took place on October 21-23 in San Jose, you came away armed with great information to help strategically position your company to prepare for the next growth wave.

Three keynotes by industry thought leaders, Choon Heung Lee, CTO, JCET; Dan Hutchison, CEO VLSI Research; and Tim Olson, Founder and CTO of Deca Technologies, offered perspective on the current climate of the semiconductor industry, and how best to weather the storm and set your company on a path to success. 

How Did We Get Here?

According to Olson, “trillion” was the magic number in 2018. The semiconductor industry shipped one trillion chips for the first time in history; more than one trillion transistors were crammed onto an AI chip to create the world’s largest chip in the world (Figure 1); and Apple became the first company ever to achieve $1T valuation, with Amazon and Google not far behind. Things were good. The industry was humming.

the semiconductor industry's largest computer chip

Figure 1: The size of an iPad, the world’s largest computer chip was built by Cerebras Systems. (photo courtesy of Cerebras Systems)

In fact, things were so good, we never saw the downturn coming, says Hutcheson. In 2018 the world economy was “firing on all cylinders.” Tax cuts were fueling the US economy. In the semiconductor industry, there was no excess capacity, and VNAND and 7/10nm technologies were ramping. There were increases in mobile content, and the latest megatrends driving us forward included cloud computing, autonomous vehicles, artificial intelligence (AI) and the Internet of Things (IoT). Not only that, but the industrial market was blooming, and China’s IC expansion offered opportunities for all.

Dan Hutcheson, VLSI Research

People paid little attention to the red flags, which Hutcheson said began to appear late in 2017. In fact, the downturn actually began in 2018, with slowing growth due to things like the Federal Reserve’s reversal of quantitative easing (QE) and rising interest rates in the US. Consumer markets slowed – particularly smartphones, PCs, and tablets. There was also a highly imbalanced growth curve across the supply chain. Throw in some “shocks to the system” like the rise and fall of cryptocurrency (remember our Beanie Baby discussion? – apparently we were right – Bitcoin mining got too expensive); the trade wars and tariffs, and slow-growing GDP growth in China and the EU, and we’ve got ourselves into a down cycle.

Bottom line: We always think it will be different, and it never is, said Hutcheson. We thought the semiconductor was no longer cyclical because we went from being product-driven to being consumer-driven. In reality, there will always be cycles, albeit less dramatic ones.

semiconductor industry market research

Figure 2: VLSI IC forecasts as of October 2019. (Courtesy of VLSI Research)

Hutchison got fairly granular with his data about the rise and fall of different market segments including DRAM, NAND, logic and analog ICs, power, and automotive ICs (Figure 2). I’m not going to go into detail here. Rather, I recommend you subscribe to VLSI Research’s SEMIWeek to stay abreast of the trends.

… and How Do We Get Out?

The good news is the worst is behind us, and the semiconductor industry is on the road to recovery, says Hutchison. Unfortunately, semiconductor equipment suppliers should be ready for a bumpy road into 2020 as the same situations that got us where we are still a concern. The value will be more important than cost. After the memory market has stabilized and advanced nodes in non-memory segments gain traction, driven by the data economy, AI automotive and other new drivers, equipment sales will bounce back.

The OSAT Dilemma

Choon Heung Lee, CTO, JCET

Speaking from the perspective of a leading outsourced semiconductor assembly and test (OSAT) service provider based in China, JCET’s , Choon Heung Lee talked about how changes in the industry is creating a dilemma for the OSATs, from the shift in business drivers: “in the 90’s it was business applications, in the 2000’s it shifted to consumer applications…” to the dramatic consolidation of customers: “We used to rely on 20 customers for our revenue. And now it’s only 10…” to growth in China “China has the next wave of packaging opportunities…”  and the growth in advanced package as the path to continue Moore’s Law (Figure 2).

semiconductor industry market research

Figure 3: Status of OSAT assembly and test growth. (Courtesy of Prismark Partners)

Side note on Moore’s Law: I know, we’ve declared it dead, but Hutchison says it’s working again, thanks to TSMC: “Moore never said you couldn’t stack die and increase density by going vertical,” said Hutchison. “When someone says Moore’s Law is going to die, they are at the end of their career. Young people who just got their Ph.D. are inspired to keep innovating. Old people don’t see how to change things. The young are driving changes. What we need to worry about is if we can continue to get innovative minds to join our industry.” Ok – so I guess we are simply redefining Moore’s law?

Speaking of TSMC, Lee says the foundry has become a “Frenemy” to the OSATS (or at least JCET).  The foundry is taking revenue for top margin packages. For example, the chip-on-wafer-on-substrate (CoWoS) package used for high-performance FPGAs requires temporary bonders and debonders, which cost $6M. Lee says investment in these tools, which cost $6M, can cripple an OSAT if the utilization falls below 50%. “OSATs have to strive for OSAT business using the SIP infrastructure so it can compete with the foundry,” he explained.

While wire bond still represents 50% of the packaging technologies being used today, the fastest-growing advanced packages include flip-chip system-in-package (FC SiP), wafer level chip scale packages (WLCSP), FC CSP, FC ball grid array (BGA) and high-density fan-out and 2.5D packages. These package types require different processes, materials, and tools. This means to remain competitive, the OSATS need to invest in capital equipment.

“It’s a risky venture because the profit margins of OSATS are classically tight – single digits to mid-teens,” said Lee. “If you want to ride the wave of AP growth areas, you need to spend money. Whoever is brave enough to invest 300M in Capex will lead the pack.”

5G is the Big Hope of Today

According to Lee, 5G is the big hope for OSATs that will drive momentum going forward. Every package needs an antenna, and different frequency ranges call for different antennas. 5G will not replace other connectivity options in a device but will be supplemental. 5G smartphone ramp-up will fill the gap for OSAT capacity as 5G SiP modules become mainstream. He recommends that Industry 4.0 should be used for SiP manufacturing lines because using AI automation inside the line will improve yields and is virtually impossible without it. He also recommends more analog conversion to advanced packaging such as WLP and more dedication to cost-efficient solutions.

One bottleneck for 5G Lee identified is test. RF testing requires specific knowledge and expertise and requires a new test platform. Here again, OSATS will need to invest in new testers if they want to compete in this space.

AI is the Future

Lee shared findings from a McKinsey report (figure 3) estimating that “growth in the semiconductor market from 2017 to 2025 will be dominated by AI semiconductors at 5X higher CAGR than all other semiconductor types combined.”

semiconductor industry market research

Worldwide deep learning chip set revenue. (Courtesy Tractica and McKinsey Research)

Packaging AI chips requires higher performance packages and will spark faster growth in HDFO, 2.5D and 3D packaging architectures. AI chips will also enable Industry 4.0 solutions that in turn should be used in OSAT lines. Lee explained that automation will improve yields and is virtually impossible without it. He predicts we will see more analog device conversion to advanced packaging, such as WLP and more dedication to cost-efficient solutions.

Tim Olson, CTO, Deca

On that topic, Deca’s Tim Olson had the solution. He talked about enabling non-monolithic SoCs of the future using advanced electronic interconnect (his replacement term for advanced packaging. Sounds cooler, doesn’t it?) to create monster chips (like the aforementioned AI chip) to be created using system-level PLP vs. traditional system-on-chip (SoC). He lifted the hood on the company’s M-Series fan-out technology to reveal how Deca tackles the #1 technology challenge of FO: die shift.

Conventional thinking calls for a high precision chip-attach machine that is slow, partially effective and very expensive, he said. Instead, getting his inspiration from Space Invaders, the 1980’s video game, he used the methodology to create real-time EDA in manufacturing. This highly complex pathfinding tool created adaptive patterning, which involves adaptive alignment and routing to create a virtual stepper mask. Instead of the slow, precise machine, M-Series is built using a high-speed chip shooter capable of 28,000 chips per hour at +/– 15 µm, as chip attached are transformed to approximately +/- 1.5µm through Adaptive Patterning. The cost of chip attach is reduced by 10x, says Olson.

New Semiconductor Industry Business Models

Olson also talked about the shift away from the traditional foundry, OSAT, EMS business models, noting that the leaders in the industry are investing across historic boundaries. For example, he said TSMC’s classic OSAT business revenue in 2018 was $2.5B, thanks to CoWoS and InFO. ASE grew its wafer-level revenue to $1.4B and system-module business to $1.5B. It invested in fan-out chip-on-substrate (FOCoS) to create heterogeneous SoC. And finally, Intel is the No. 1 company in the world investing in packaging with its EMIB and Foveros technology.

“For the first time in history, the package is driving the products and allowing things to go beyond monolithic interconnect,” he said. At 3D InCites we say, it’s about time.

More to come from IWLPC. Stay tuned for the PLP SmackDown and Exhibitor Updates.  ~  FvT