Archives October 2019 - 3D InCites

The IWLPC Fan-out PLP Smack Down

The IWLPC Fan-out PLP Smack Down

At IWLPC 2019, the fan-out panel-level packaging (PLP) debate continued in another of Jan Vardaman’s famous lively panel discussions, which was co-moderated by PLP technology expert, Tanja Braun, Fraunhofer IZM. Panelists were John Hunt, ASE; Joseph Dang, AT&S; Keith Best, Rudolph Technologies; Tim Olson, Deca Technologies. Fan-out PLP  (FO PLP) has been a hot topic on the conference circui... »

MSEC 2019: MEMS and Sensors Have a Lot to offer for System Designers

MSEC 2019: MEMS and Sensors Have a Lot to offer for System Designers

At MSEC 2019 in San Diego, CA, MEMS and sensors experts gathered to exchange ideas about how to utilize the many strengths microelectromechanical systems (MEMS) and sensors to enhance the capabilities of electronic systems. Many focused on adding AI to their devices to provide higher-value solutions. »

Weathering The Storm and Positioning the Semiconductor Industry for Growth

Weathering The Storm and Positioning the Semiconductor Industry for Growth

At last week's IWLPC 2019, Three keynotes by industry thought leaders provided perspective on the current climate of the semiconductor industry, and how best to weather the storm to set your company on a path for success. »

The World Series 2019: The Technology of Baseball

The World Series 2019: The Technology of Baseball

I’m a huge baseball fan. And while my favorite team, the Arizona Diamondbacks didn’t even make it into the playoffs, it doesn’t mean I’m not glued to my MLB app to keep track of the World Series. I LOVE IT!  ALL OF IT!  The plays, the jockeying for position, the fans, the sportsmanship, the energy – it fascinates me, and there is so much to experience! When most people think of basebal... »

IFTLE 429: Samsung 12-layer memory with 3D-TSV; SHIP Winners   

IFTLE 429: Samsung 12-layer memory with 3D-TSV; SHIP Winners   

Samsung Electronics has announced the development of 12-layer memory using 3D through silicon via (3D-TSV) chip packaging technology. TSVs vertically interconnect the two DRAM chips through more than 60,000 TSVs. Despite the increase in the number of layers from eight to 12, the overall thickness of the package remains at 720 µm so designers will not have to change dimensions to use the new techn... »

keeping the world clean

Are You Keeping The World Clean for Your Children and Grandchildren?

Adjusting or repairing some of the sprinkler heads on my lot is a regular Spring duty for me. This year, when I was working on my front lawn, my 97-year old neighbor, a former doctor (MD), and the only original owner of one of the 70-year old homes on our street walked by. His 5-year old great-grandson accompanied him. It happened to be garbage day and earlier that day, I had lined up along the cu... »

MRSI to offer Die bonding Demonstrations at Productronica

MRSI to offer Die bonding Demonstrations at Productronica

MRSI Systems (Mycronic Group) will be exhibiting with Mycronic at Productronica. Die bonding demonstrations will be offered at the Mycronic Booth #341 in Hall A3 (SMT Cluster). The exhibition will be held at Messe München in Munich, Germany from November 12-15, 2019. MRSI will demonstrate the industry-leading 1.5 micrometer die bonder, MRSI-H-LD for high-volume manufacturing of advanced photoni... »

IFTLE 428: Panel Level Processing: We’ve Come A Long Way Baby!

IFTLE 428: Panel Level Processing: We’ve Come A Long Way Baby!

Remember when panel level processing was called large-area processing? Here, Phil Garrou provides a history lesson beginning from when he and Ted Tessier first presented the concept, to today's progress. »

Highlights from EDPS 2019

Highlights from EDPS 2019

The Electronic Design Process Symposium – EDPS 2919 – is known in the IC design community as a rather small (50 – 100 participants), but a highly interactive workshop. The 26th edition, hosted again this year by SEMI at its Milpitas headquarters, October 3-4, 2109 featured both EDPS IC design experts and a growing number of manufacturing experts, who presented and discussed the latest innova... »

IWLPC 2019 Brings You Advanced Packaging in an Interconnected World    

IWLPC 2019 Brings You Advanced Packaging in an Interconnected World    

Anyone who’s anyone with a hand in the evolution of wafer-level packaging will be in attendance or exhibiting at the 16th Annual International Wafer-Level Packaging Conference (IWLPC) and Tabletop Exhibition next week. 3D InCites will be there and we’re excited to engage and learn from the industry’s most respected authorities addressing all aspects of wafer-level, 3D device packagin... »

Page 1 of 3123