Archives March 2019 - 3D InCites

IFTLE 408: Plasma Dicing ; Intel compares High-density Packaging for HI

IFTLE 408: Plasma Dicing ; Intel compares High-density Packaging for HI

Plasma Dicing Advanced packaging is bringing with it new ways to separate die from the wafer. In the past, wafer dicing was traditionally carried out using conventional dicing “saw”. However, this method has limitations such as die chipping or cracking leading to lower device yields. Also, the width of the blade removes valuable “real estate” from the wafer. Newer techniques include laser ... »

The 5G Revolution is Pushing Innovations for RF front-end SiP

The 5G Revolution is Pushing Innovations for RF front-end SiP

Without a doubt, 5G has arrived and various key smartphone OEMs have already announced products that will support 5G cellular and connectivity. It is clear for everyone that 5G will totally redefine how the radio frequency (RF) front-end interacts in-between the network and the modem. The new RF bands (sub-6 GHz and mm-wave, as defined in 3GPP release 15) pose big challenges for the industry. The ... »

Trymax Launches New UV Curing and Charge-Erase Product Line

Trymax Launches New UV Curing and Charge-Erase Product Line

Trymax Semiconductor Equipment BV (Trymax), a global leader in plasma solutions for semiconductor manufacturers, announces the addition of an ultraviolet (UV) curing and charge-erase product line to its portfolio. The system called NEO 2000UV is a leading-edge dual chamber solution compliant with wafer sizes up to 200mm. UV curing and charge-erase equipment are used for a wide range of application... »

CoolCube™: More than a True 3D VLSI Alternative to Scaling

CoolCube™: More than a True 3D VLSI Alternative to Scaling

Almost four years ago, we published an article titled “CoolCube™: A True 3DVLSI Alternative to Scaling” on 3D InCites. It described the concept of stacking layers of transistors sequentially on top of each other and documented the research effort happening at Leti to develop a feasible process integration scheme and a comprehensive product design frame. Now, four years later, we can say that... »

IFTLE 407: Intel Lakefield Uses 3D Stacking; SEMI Europe’s 3D & System Summit

IFTLE 407: Intel Lakefield Uses 3D Stacking; SEMI Europe’s 3D & System Summit

At CES 2019, Intel previewed a new client platform, code-named “Lakefield”. It featured the first iteration of its new innovative Foveros 3D packaging technology. The Lakefield stacked module will contain: 10nm hybrid CPU architecture Gen 11 graphics Multiple dies stacked on top of each other The die is then stacked using micro-bumps on the active interposer through which through silicon v... »

EV Group Partners with NSI to Enable First Wafer-level Heterogeneous Integration of GaAs on Silicon for RF Front-end Module Manufacturing

EV Group Partners with NSI to Enable First Wafer-level Heterogeneous Integration of GaAs on Silicon for RF Front-end Module Manufacturing

EV Group (EVG), a leading supplier of wafer bonding and lithography equipment, today announced that it has partnered with Ningbo Semiconductor International Corporation (NSI), a specialty semiconductor foundry based in Ningbo, China, in the development of the industry’s first process technology platform for wafer-level heterogeneous integration of gallium arsenide (GaAs) on silicon for use in R... »

Celebrating 25 Years of Advanced Packaging Innovation: Part 2

Celebrating 25 Years of Advanced Packaging Innovation: Part 2

Picking up where we left off, Part two of this series celebrating advanced packaging innovation takes us from 2009-2019, beginning with the establishment of 3D InCites in 2009. The first conference I covered was the IMAPS Device Packaging Conference in 2009. We officially launched the first website in time for SEMICON West 2009. Remember the logo? Things could only improve from here. In 2012, now... »

Rudolph Technologies Introduces New JetStep Lithography Systems at SEMICON China 2019

Rudolph Technologies Introduces New JetStep Lithography Systems at SEMICON China 2019

Rudolph Technologies, Inc. (NYSE: RTEC) today announced the immediate availability of its new JetStep® lithography systems for advanced packaging processes on wafer and panel formats. The JetStep systems incorporate an option for a new, proprietary submicron lens design, as well as up to 25% increased productivity over the previous JetStep systems. The JetStep wafer stepper will also feature a 20... »

Celebrating 25 Years of Advanced Packaging Innovation: Part 1

Celebrating 25 Years of Advanced Packaging Innovation: Part 1

After spending three days in the company of the IMAPS community at the 15th annual IMAPS Device Packaging Conference (IMAPS DPC) March5-7,2019, in Fountain Hills, Arizona, I am once again reminded why I chose to focus 3D InCites on the advanced packaging segment of the semiconductor industry. The technology is fascinating and varied, the conversation is inspiring, and the people know how to have a... »

Trymax Signs Strategic Financial Partnership with NIBC Bank

Trymax Signs Strategic Financial Partnership with NIBC Bank

Trymax Semiconductor Equipment BV (Trymax), a global leader in plasma-based equipment and solutions for semiconductor manufacturers, is pleased to announce NIBC Bank as a new strategic financial partner. This partnership will enable Trymax to accelerate new technology developments and scale up its manufacturing capacity. The Dutch merchant bank is providing growth capital via a minority equity pos... »

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