“Automotive applications are the new El Dorado for microelectronics,” announces Emilie Jolivet, Director, Semiconductor & Software at Yole Développement (Yole). The market is showing significant market drivers that are daily supporting the growth: electrification, connectivity, autonomy, and comfort are the keywords of today’s automotive industry. Under this dynamic context, the market ... »
Continuing our look at presentations from the recent 2018 IWLPC conference, let’s look at the Jiw Pai Henkel presentation on advanced packaging underfills. Henkel – Underfill Options for Advanced Packaging Bai and co-workers examined the use of capillary underfill (CUF), non-conductive paste (NCP) and non-conductive film (NCF) in advanced packaging applications (Figures 1 and 2). Each of... »
Wilmington, Mass. (January 15, 2019)—Rudolph Technologies, Inc. (NYSE: RTEC) announced today that it has received orders for over $15 million of legacy and new process control systems from a memory manufacturer based in Asia. The systems will be used by a top-tier memory chip maker as they rapidly transition high-end DRAM (DDR4, DDR5) and HBM DRAM packaging from wire bonding to advanced packagi... »
SEMI held its annual Industry Strategy Symposium (ISS 2019) at the Ritz Carlton in Halfmoon Bay, CA January 6-9, 2019. Many high-level executives represented key areas of the electronic products supply chain. Former government officials emphasized that our country’s leaders recognize the strategic importance of semiconductors. The theme of ISS 2019 was: “The Golden Age of Semiconductors: Enabl... »
Shrinking silicon process nodes and increasing memory demands are a nightmare for PCB design teams working with custom ASICs or SoCs on high-performance systems. Huge devices with challenging bump and package-ball net assignments must be integrated onto the PCB while overall system integrity is maintained and signal-layer count and overall PCB size stay within system and cost constraints. This pap... »
The widespread deployment of 3D stacked CMOS Image Sensors (CIS) in consumer electronics, namely smartphones, by handset makers domestic (Apple, iPhone) and overseas (Samsung, Galaxy), is certain proof that 3D integration technologies pivoted over the last ten years from being something useful only for fairly esoteric applications and high ASP products, to being a technology that reached the right... »
I cannot believe 3D InCites is already turning 10! As wise people say, time flies! Taking a step back, I have to admit a lot of progress has been made since my first attendance as a young engineer to the EMC 3D workshops back in 2008. At that time, we were discussing how to form a via, how to fill it, how to use a temporary wafer carrier to process thin wafers…etc. We are definitely more m... »
Wilmington, Mass. (January 8, 2019)—Rudolph Technologies, Inc. (NYSE: RTEC) announced today that it has received orders for 12 of its Dragonfly™ G2 system, just months after releasing the product. Several systems were delivered in the fourth quarter to the largest OSAT where the Dragonfly G2 systems displaced incumbent 3D technology and retained the Company’s market leadership in 2D ma... »
As its name implies, the International Wafer Level Packaging Conference (IWLPC) initially covered wafer-level packaging (WLP) technologies. As all conferences do, it soon expanded its scope to cover basically all advanced packaging topics including WLP, fan-out wafer-level packaging (FOWLP), 2.5D/3D, and advanced manufacturing and test, etc. Statistics from this year’s show include: 809 Atte... »
Fan-out panel level production is underway at Powertech Technology, Inc. (PTI) for MediaTek’s power management integrated circuit (PMIC) for smartphone applications. The Samsung Galaxy watch uses the fan-out panel level process (FOPLP) developed by Samsung Electro-Mechanics (SEMCO) to package the application processor and PMIC. Future applications under consideration for panel production in... »
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