Archives June 2018 - 3D InCites

Transforming the Fan-out Landscape

Transforming the Fan-out Landscape

These days, the first thing that comes to mind when someone mentions fan-out (FO) technology is Apple’s A10 processor built on TSMCs integrated fan-out (InFO) technology. It’s the superstar application that put FO on the map and into high volume manufacturing. However, equally important to remember are the numerous low-density FO workhorses supporting other mobile applications, as well as mark... »

TechSearch International Analyzes Trends in FO-WLP including Panel Activity

TechSearch International Analyzes Trends in FO-WLP including Panel Activity

While Apple remains the main customer for TSMC’s Integrated Fan-Out WLP (InFO-WLP), an increasing number of companies are adopting a large area version of FO on Substrate. HiSilicon has been in production with ASE’s FOCoS for several years and MediaTek just announced a logic device for networking applications using TSMC’s InFO on Substrate (InFO_oS). TSMC’s FO-WLP platform has been extende... »

EV Group Earns Sixth Consecutive Triple Crown Win in VLSIresearch 2018 Customer Satisfaction Survey

EV Group Earns Sixth Consecutive Triple Crown Win in VLSIresearch 2018 Customer Satisfaction Survey

EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that customers have once again voted the company one of the 10 BEST Focused Suppliers of Chip Making Equipment and one of the BEST Suppliers of Fab Equipment in the 2018 VLSIresearch Customer Satisfaction Survey, increasing its score in both award s... »

Tech Round-up from ECTC 2018

Tech Round-up from ECTC 2018

For the past few years, the ECTC committee has provided 3D InCites with a table outside the session rooms, rather than the technology corner, as part of our media trade. We consider it to be prime real estate, as pretty much everyone passes by the table at one time or another. People stopped by to chat; some just to ask where to find the registration desk, or the coffee, or in one instance, “are... »

Co-Design Comes to ECTC 2018: You Can Lead A Horse to Water…

Co-Design Comes to ECTC 2018: You Can Lead A Horse to Water…

Despite a valiant effort by the ECTC committee to integrate design topics into this year’s agenda, the number of empty seats spoke volumes: Including two plenary sessions on design-focused topics was one thing; getting packaging and process engineers to attend was quite another. While I attended IC Package Co-Design for HI Systems and AI and Its Impact on System Design, I have to admit, I found ... »

Special ECTC 2018 Session Focuses on Frontiers in Assembly Technology

Special ECTC 2018 Session Focuses on Frontiers in Assembly Technology

The special Tuesday session at ECTC 2018 took a look at new methods and applications for assembly technology to accommodate the needs of heterogeneous integration at the system level. The session was chaired by Florian Herrault, HRL Laboratories, and featured Jeff Demmin, DARPA; Stefan Behler, Besi; Matthew Meitl, X-celeprint; Doris Tang, PlayNitride; and Val Marinov, Uniquarta. Presentations offe... »

Fan-out is Hot, 3D Is Back, and 5G is Needed: The Inside Scoop from ECTC 2018

Fan-out is Hot, 3D Is Back, and 5G is Needed: The Inside Scoop from ECTC 2018

There’s fact, and there’s perception. The messages people carry away from conferences are not only influenced by what they hear from the speakers, but also from the conversations they have with their colleagues. This post contains a little of both. At IMAPS Device Packaging Conference in March, Yole Developpement analyst, Emilie Joliet announced to the industry that at long last, 3D in... »

Optimizing Your SoCs and ASICs to Design PCBs More Cost Effectively

Optimizing Your SoCs and ASICs to Design PCBs More Cost Effectively

Many high-performance systems today use custom ASICs or SoCs to provide the necessary computational power and data bandwidth demanded by their host system, whether it’s a network storage device, network data switch, complex industrial equipment controller, or a critical core module of a defense system. And they are not getting any smaller or slower as silicon process nodes shrink and memory dema... »

The Heterogeneous Integration Roadmap Explained by Bill Chen

The Heterogeneous Integration Roadmap Explained by Bill Chen

Festivities at ECTC 2018 kicked off May 29, 2018, with a full-day Heterogeneous Integration Roadmap (HIR) Workshop. This workshop was a continuation of an ongoing series that have been scheduled alongside major conferences around the globe so that as many people as possible can participate. We’ve been following the progress since the beginning. I caught up with Bill Chen, president of the IE... »

ECTC 2018 Paves the Path to Heterogeneous Integration

ECTC 2018 Paves the Path to Heterogeneous Integration

For nine years, my fellow 3D InCites bloggers and I have been evangelizing about the wonders the microelectronics industry can achieve with innovations in 3D, advanced packaging, and other heterogeneous integration (HI) technologies. Based on the turnout at this year’s IEEE Electronics Components and Technologies Conference, which took place May 29-June 1 in San Diego, CA, it would appear that t... »

Page 1 of 212