Archives February 2017 - 3D InCites

More-than-Moore 2.5D and 3D SiP Integration

More-than-Moore 2.5D and 3D SiP Integration

A new book on 2.5D and 3D integration, written by Riko Radojcic and published by Springer, will soon be available. The book addresses the current status of More-than-Moore system-in-package (SiP) technologies and explores the technical and business tradeoffs for deploying these options in high volume commercial IC products. We’re pleased to provide an excerpt of the preface: “There is a lot of... »

Finding The Next Switch for Semiconductor Scaling

Finding The Next Switch for Semiconductor Scaling

The data traffic explosion, fueled by the Internet of Things (IoT), social media and server applications, has created a need for ever-advancing semiconductor technologies. Servers, mobile devices, IoT devices… they drive the requirements for semiconductors’ future processing and storage capacity. But will we be able to continue traditional semiconductor scaling, as initiated by Gordon Moor... »

Panel Level Packaging: One Size Fits All?

Panel Level Packaging: One Size Fits All?

There is an active and robust supply chain currently supporting these wafer sizes in the semiconductor manufacturing industry: 3”; 4”; 6”; 200mm; 300mm; and 330mm. This wide range of substrates is successfully being used today for “sweet-spot’ manufacturing of LED, compound semiconductor, MEMS, trailing-edge CMOS, leading-edge CMOS, and fan-out wafer level packaging (FOWLP) applications,... »

Rudolph Receives Multi-System Order from Leading Memory Manufacturer for Advanced Memory Ramp

 Wilmington, Mass. (February 16, 2017)—Rudolph Technologies, Inc. (NYSE: RTEC) announced today that a leading memory manufacturer in Asia has placed orders totaling over $8 million USD for process control equipment to support the ramp of their latest high-performance stacked memory devices. The equipment spans front- and back-end applications. It includes MetaPULSE® metrology systems for pla... »

Using 3D Integration to Get the Heat Out

Using 3D Integration to Get the Heat Out

Thermal management is one of the last vestiges of 3D integration challenges. As such, the European 3D Summit (Jan 23-25, 2017) devoted its entire R&D segment to explore what is in the works to solve this in a session titled Tackling the Thermal Management Challenge. Chaired by Jean Michailos, STMicroelectronics the session featured the following talks: Integrated and Self-Adaptive Microfluidic... »

Highlights from the 2017 European 3D Summit

Highlights from the 2017 European 3D Summit

The 5th Annual European 3D Summit drew 220 attendees from 18 countries who gathered to understand the latest advanced packaging, 2.5D and 3D IC technologies being developed to achieve next-generation device requirements. In addition to informative sessions, attendees enjoyed some camaraderie, as we’ve all been meeting for a number of years to get 3D integration off the ground. The highlight ... »

Process Control Gains Importance in Advanced Packaging Applications

Process Control Gains Importance in Advanced Packaging Applications

2016 will be remembered as the year fan-out wafer level packaging (FOWLP) went mainstream, thanks to TSMC’s strategic move in the advanced packaging arena and especially its integrated fan-out (InFO) win inside the iPhone 7. Already in high-volume manufacturing (HVM), FOWLP volumes significantly increased in magnitude. Will this strong momentum continue over the next few years? I believe it will... »

The Edge of 3D: 3D SoC VLSI and Si Photonics

The Edge of 3D: 3D SoC VLSI and Si Photonics

Last week, I posted an executive summary of this year’s European 3D Summit, touching on the highlights and general takeaways based on the closing remarks I delivered at this year’s well-attended event, which took place January 23-25, 2017 at Minatec Campus in Grenoble. In this post, we’ll take a deeper dive into some of the edgier technologies in development that were presented, and what is ... »

Welcome to a New Era of Predictive Yield Process Control for Advanced Packaging

Welcome to a New Era of Predictive Yield Process Control for Advanced Packaging

In April 2016, Fogale Nanotech Group acquired the assets of Altatech Semiconductor from Soitec in order to combine the metrology offerings of Fogale Nanotech Semicon with Altatech’s unique 2D and 3D inspection capabilities. The idea was to create a powerhouse of process control for emerging advanced packaging processes for next-generation fan-out wafer-level packaging (FOWLP), 2.5D interposer, 3... »

Silicon Patents: Repeating the Past

Silicon Patents: Repeating the Past

“Those who cannot remember the past are condemned to repeat it” ~ George Santayana Over the past forty years, the presence of legally protected Intellectual Property (IP) has dramatically grown in the processes of electronic system development and deployment. Teams that use IP in product design and/or in subsequent product deployment and support have the additional corporate responsibilit... »