Archives October 2014 - 3D InCites

Putting 3D Integration to the Test

Putting 3D Integration to the Test

3D stacking is “already old hand”; or so declared Brion Keller, Cadence, in his keynote talk at last week’s 5th Annual 3D Test Workshop, which took place in Seattle, October 23-24, 2014. In his presentation, 3D Rock from the Sun, Keller talked about the wonders of technological progress, and how we are pulled in the direction of 3D integration because there are products that will have no ot... »

GSA 3D IC Working Group Looks at 3D IC Readiness from Design through Manufacturing

GSA 3D IC Working Group Looks at 3D IC Readiness from Design through Manufacturing

At the recent GSA 3D IC Working Group Meeting (October 22, 2014), where speakers from BroadPak, Amkor, and Invensas presented on 3D IC readiness, I was struck by three observations. First of all, while challenges to 3D commercialization still remain, but they’ve shifted from manufacturing challenges to design and infrastructure challenges. Secondly, high volume manufacturing (HVM) means differen... »

3D ASIP 2014 Pre-Conference Symposia Place Emphasis on 3D Design Tools and Flow, and Manufacturing Process Technology

3D ASIP 2014 Pre-Conference Symposia Place Emphasis on 3D Design Tools and Flow, and Manufacturing Process Technology

As 3D integration processes move into volume manufacturing, the 11th Annual 3D Architectures for Semiconductor Integration and Packaging Conference (3D ASIP), which takes place December 10-12 in San Francisco, is gearing up to be the go-to event for this hot market sector. With an expanded full-day pre-conference symposium on design and manufacturing for practical 2.5D and 3D implementation in add... »

IMAPS 2014

3D Technology Snapshots from IMAPS 2014

This year’s IMAPS International Symposium purported to have “the most interposer and 3D content under one roof.” I’m not sure about that, but there was certainly enough 3D going on at IMAPS 2014 to spark my interest. Here are some highlights I came away with, based on presentations, interviews with industry suppliers and a stroll around the exhibitor floor. The Glass is Half-Full As Ve... »

IMAPS 2014: The Future of Packaging is System Integration

IMAPS 2014: The Future of Packaging is System Integration

The annual International Microelectronics and Packaging Society (IMAPS) International Symposium has always focused more on advancements in mainstream packaging technologies, and left the emerging innovative processes to its spring event, the International Device Packaging Conference. As such, its speakers generally offered the most conservative viewpoints on 3D adoption. In a refreshing turn of ev... »

3D By Design: Exploring Viable Path Finding

3D By Design: Exploring Viable Path Finding

Fruitful path finding eventually identifies solutions that are viable for mechanical, electrical, thermal, and cost (METC) requirements. Hopefully, more than one viable solution is found to offer a backup in case something was overlooked during exploration or your supply chain can no longer support your needs. Even if you need to re-explore due to changing situations, path finding is still faster... »

TSMC’s 2014 Open Innovation Platform Ecosystem Forum

TSMC’s 2014 Open Innovation Platform Ecosystem Forum

Like many years before, I had the opportunity to attend the annual TSMC Open Innovation Platform Ecosystem Forum in San Jose’s Convention Center, held this year on September 30, 2014. TSMC always has a lot of progress to report from year to year. Last week’s event was no exception and demonstrated that this large corporation has the finger on the pulse of our industry. In my eyes, the most i... »

Vive la SEMICON Europa (!)

Vive la SEMICON Europa (!)

As we move into the final quarter of the year, October marks the annual gathering of Europe’s microelectronics industry at SEMICON Europa. This year’s show, which took place October 6-8, 2014, once again attracted the leading players from across the industry value chain, but with an added French twist of being hosted in the Alpine city of Grenoble for the very first time. The new surroundings ... »

Designing in 3D? Don’t Make These DFT Mistakes

Designing in 3D? Don’t Make These DFT Mistakes

The semiconductor industry hasn’t adopted 3D ICs as quickly as many in the industry expected. There are some barriers that perhaps have kept the cost/benefit analysis stuck in the ‘scaling’ camp rather than moving it to the ‘3D’ camp. However, many companies are preparing for the move to 2.5D and 3D in the future. From a DFT perspective, the barriers are actually quite low; designers hav... »

SUSS MicroTec Launches SB6/8 Gen2: A Next-Generation Semi-Automated Permanent Wafer Bonder

SUSS MicroTec Launches SB6/8 Gen2: A Next-Generation Semi-Automated Permanent Wafer Bonder

Garching, October 7, 2014 – SUSS MicroTec, a leading supplier of equipment and process solutions for the semiconductor and related markets, has launched its next-generation semi-automated permanent wafer bonder today. The SB6/8 Gen2 Wafer Bonder is SUSS MicroTec’s state-of-the-art universal permanent wafer bonding system that handles wafers up to 200 mm and supports various substrate types ... »

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