Archives March 2014 - 3D InCites

Calling for A Collaborative Semiconductor Supply Chain Comes at DATE 2014

Calling for A Collaborative Semiconductor Supply Chain Comes at DATE 2014

Design and Test Europe 2014 (DATE 2014), which took place in Dresden, March 24-28 2014, brought together semiconductor design and test engineers from all over Europe and around the world for the purpose of understanding the latest trends, methodologies, and technologies being developed to address the ever-changing needs of chip design and test for the semiconductor and microelectronics industry. ... »

Copyright: Nino Halm (Photographer)

The Fraunhofer Cluster for 3D Integration Looks at the Big Picture

Two years ago, I visited to Fraunhofer IZM-ASSID, located in Dresden, Germany; to see first-hand what this particular arm of Fraunhofer Gesellschaft was all about. Juergen Wolf, head of IZM-ASSID, gave me the grand tour of the 300mm cleanroom and explained the organization’s focus on developing Cu TSV technologies in 300mm wafers for both 2.5D interposer and 3D IC applications. For the past ... »

Silicon Saxony: Leading the Charge in More than Moore

Silicon Saxony: Leading the Charge in More than Moore

Since the days even before the reunification of Germany; Saxony, and particularly Dresden, has been a vital center for microelectronics development in Europe. And since the reunification, Dresden has focused its investments on a single area: high technology and affiliated research. Both GLOBALFOUNDRIES and Infineon have a significant presence here, as well as many divisions of the Fraunhofer-Gese... »

Fogale Nanotech: Building The Swiss Army Knife of 3D IC Metrology and Inspection

Fogale Nanotech: Building The Swiss Army Knife of 3D IC Metrology and Inspection

In the world of 3D ICs, where features are becoming finer and submicron accuracy and precision is more important than ever to maintain intra-wafer uniformity throughout the wafer or die stacking process flow, process control by means of metrology and inspection is more important than ever. The industry offers a number of non-destructive options – optical, X-ray, scanning acoustic microscopy – ... »

Breaking Down Walls between Board, Package, and IC Design Steps

Breaking Down Walls between Board, Package, and IC Design Steps

Many years ago, when I started in the semiconductor business, the circuit designers only had to worry about functionality and, after completing their job, “threw the design over the wall” to the layout team or contractor. As recently as 10 years ago, IC designers only had to worry about silicon performance and after verifying functionality and timing, they “threw the design over the wall” ... »

3D Architectures

Nimes, France: Influencing 3D Architectures for 2000 Years

I first visited Nimes, France when I was sixteen, on one of those whirlwind, ten-day, school-organized trips with my French 2 class. What I remembered most about it was the Roman architecture. We spent less than 24 hours there on the way to Avignon. At the time, I would never have guessed that several decades later, I would be back to pay a visit to the world headquarters of Fogale Nanotech, manuf... »

A Solder Bump Expert’s Take on the Expanding World of Advanced Packaging

A Solder Bump Expert’s Take on the Expanding World of Advanced Packaging

An interesting take-away from the keynote talk delivered by Brandon Prior, Prismark Partners, at this year’s IMAPS International Device Packaging Conference, held March 11-13 in Fountain Hills, AZ, was the observation that just because new advanced packaging types are being introduced to the market, it doesn’t mean that older ones are dropping off or becoming obsolete. As a result, wha... »

Latest Developments in Cleans for TSVs and Cu Bumps

Latest Developments in Cleans for TSVs and Cu Bumps

At IMAPS DPC 2014, which took place March 11-13, 2014, in Fountain Hills, AZ, there were several presentations focused on new developments in cleans for TSVs and Cu bumps for 2.5D and 3D IC processes. Cleans has become increasingly important as bump pitches are reduced and TSVs have higher aspect ratios. It’s not just about being clean enough, but also about surface preparation for the next proc... »

Advanced Packaging Alphabet Soup Creates Chaos for IMAPS 3D Panel

Advanced Packaging Alphabet Soup Creates Chaos for IMAPS 3D Panel

All hell broke loose at the 3D Panel discussion at the 2014 IMAPS International Device Packaging Conference. Nobody was hurt, and nothing got thrown, mind you, but it’s clear that we’ve got some very different opinions regarding one of my  pet peeves – the ever-expanding and increasingly complex advanced packaging nomenclature. Oh it started out innocently enough. The aim of the panel, titl... »

3D InCites Partners with SEMI and TechSearch International  for the 2014 3D InCites Awards Program

3D InCites Partners with SEMI and TechSearch International for the 2014 3D InCites Awards Program

Proceeds to Benefit STEM-based Scholarship Programs PHOENIX– March 18, 2014 – 3D InCites, the premier online content source for reliable 3D technology information, today announced that it has partnered with SEMI and TechSearch International to host the second annual 3D InCites Awards. Proceeds of the 2014 awards program will fund a newly formed 3D InCites STEM Scholarships program, which this ... »

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