Archives December 2013 - 3D InCites

Tezzaron, Ziptronix, and Invensas Demonstrate Interconnectology in Action

Tezzaron, Ziptronix, and Invensas Demonstrate Interconnectology in Action

It may have been a coincidence that at last week’s 3D ASIP Conference, Invensas, Tezzaron/Novati, and Ziptronix booths were lined up next to each other in the exhibit hall, but then again maybe it was just Interconnectology in action. News linking Tezzaron/Novati with both Ziptronix and Invensas indicates progress for all three companies in the 3D IC space, and leaves open the question of how lo... »

2.5D Interposer Innovations from Silex and eSilicon

2.5D Interposer Innovations from Silex and eSilicon

2.5D interposers sparked a good amount of discussion at this year’s 3D ASIP conference (December 11-13, 2013, Burlingame CA), with a session devoted to “Interposers for all of Us” and other presentations scattered throughout the program to address such issues as thin wafer handling, and heterogeneous integration. Weighing in on Si interposer innovations was Peter Himes, of Silex, who talked ... »

3D NAND Flash – Towering Spires or Costly Canyons? – Part 4

3D NAND Flash – Towering Spires or Costly Canyons? – Part 4

If you’ve followed me thus far in the three preceding posts, well done! We started by questioning the cost assumptions. Then we set the scene to be able to explain the vanishing string current problem, and then introduced the concept of pass disturb. In this post, as promised in the previous one, I want to deal with pass disturb in more detail, which is one of the more important reliability chal... »

Happy Holidays from 3D InCites!

Happy Holidays from 3D InCites!

It’s that time of year again! Each year, we select different members of the 2.5D and 3D industry to feature in our annual holiday card along with the Queen of 3D. This year’s holiday video from 3D InCites features members of our technical advisory board who have not appeared in previous year’s cards. See if you can identify who they are. This is just our way of saying “tha... »

3D Readiness Report Card

3D ASIP 2013: Jan Vardaman’s 3D Readiness Report Card

While other presenters for the 2013 3D ASIP session, “Evolution of 3D Technologies and Market Trends” took a more conventional approach to reporting the status of 3D integration, Jan Vardaman, TechSearch International gets the prize for originality and humor for playing the role of “professor” and delivering the 3D readiness report card, grading progress in the key challenge areas. Her app... »

Meet the Multitest 3D IC Test Experts at the European 3D TSV Summit

Meet the Multitest 3D IC Test Experts at the European 3D TSV Summit

Multitest, announces that experts for 3D IC test will present at the European 3D TSV Summit in Grenoble, Jan 20-22, 2014. In Session 4 “Supply Chain Readiness for HVM”, which takes place on Tuesday, January 21, 2014, Multitest experts will talk about “Test strategies for 2.5 & 3D”. In the following panel Multitest will discuss about “2.5D Interposer Supply Chain: Ready for HVM?” to... »

Catching up with Sand 9 at the MEMS Executive Congress 2013

Catching up with Sand 9 at the MEMS Executive Congress 2013

Sometimes 3D IC/TSV news comes in with a splash on the front page of the morning paper, maybe somewhere above the fold, and sometimes 3D IC/TSV news comes in on stealthier feet, when a page is turned to reveal just what it is certain start-up companies have been doing all along with though silicon via (TSV) technology in their product architecture. Such is the case with Sand 9, a company that mayb... »

Image Courtesy of TSMC Ltd.

3D ASIP 2013: Coming Down The Home Stretch to 3D IC Commercialization

For years, we’ve been talking about the performance and power benefits of 2.5D and 3D ICs. We’ve also been talking about the remaining challenges, and have steadily ticked off the technology-related ones. The “elephant-in-the-room” has been, and continues to be cost. But based on the messages of some key industry players who presented at this year’ 3D Architecture’s for Semiconductor I... »

IME's Silicon Photonics

Si Photonics: 3D ASIP’s Pre-game Show

Is Si photonics the vehicle that will finally catapult 2.5D and 3D IC to stardom? While that was the story told during an R&D panel at SEMICON West, it’s not exactly accurate. At this week’s 3D Architectures for Semiconductor Integration and Packaging (3D ASIP) which took place Wednesday, December 11, 2013 at the Hyatt Regency San Francisco Airport, it became clear that High Bandw... »

SSEC Scores Double Tool Win for Thick-Film Removal Processes in Leading Asian Foundry and Major US Chip Manufacturer

SSEC Scores Double Tool Win for Thick-Film Removal Processes in Leading Asian Foundry and Major US Chip Manufacturer

Solid State Equipment LLC (SSEC), provider of single-wafer wet processing systems for advanced packaging (including 2.5D and 3D-ICs), MEMS, and compound semiconductor markets,  announces two major wins for its WaferStorm platform at a leading foundry in Asia and a major US integrated device manufacturer (IDM). In both cases, the systems were selected for their thick-film removal capabilities whic... »

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