Archives April 2011 - 3D InCites

Major Semiconductor Companies Join SEMATECH’s 3D Enablement Center to Accelerate Adoption of 3D TSV Technologies

SEMATECH announced that Advanced Semiconductor Engineering (ASE) Incorporated, Altera Corporation, Analog Devices Inc. (ADI), LSI Corporation, ON Semiconductor Corporation, and Qualcomm Incorporated have joined SEMATECH’s 3D Enablement program based at the College of Nanoscale Science and Engineering (CNSE) of the University at Albany. These leading semiconductor companies will join CNSE, Global... »

CEA-Leti to Implement Multiple EV Group Systems on its New 300-mm Fab Line Dedicated to 3D Integration

St. Florian, Austria, April 19, 2011 – EV Group (EVG) today announced that its longtime customer and partner, industry-leading research center CEA-Leti (Grenoble, France), has installed multiple EVG tools in its industry-first 300-mm cleanroom dedicated to R&D and prototyping for 3D-integration applications.  While Leti’s new state-of-the-art facility is focused on R&D and prototypi... »

STATS ChipPAC Expands TSV with Mid-End Processing

STATS ChipPAC Ltd, and outsourced semiconductor assembly and test (OSAT) provider, announced it is expanding its 300mm through silicon via (TSV) offering with the addition of mid-end manufacturing capabilities. STATS ChipPAC was one of the first OSATS to invest in TSV technology with a 51,000 square foot research and development facility dedicated to the development of next-generation wafer level »

The Road to 3D integration is paved with silicon interposers

Will the path to 3D integration be evolutionary or revolutionary?  Will 2.D interposer technology be the only route or is “true” 3D integration inevitable?  These discussions and debates have taken center stage at most 3D events over the past few years. At this year’s GSA’s Memory Conference on March 31, which focused on 3D architectures, the debate continued, but it seemed that the two ... »

Exploring New Approaches to 3D Integration

In this article that appeared in the April Issue of CSR Tech Monthly, Andrew Smith, Ron Csermak, and Mark Vandermeulen  of ON Semiconductor discuss the company's novel approach to 3D integration without TSV interconnects. Designers seeking electronic package miniaturization but lacking the resources to utilize custom ASIC or complex 3D integration approaches can now take advantage of chip sta... »

Going UP! Next-Generation IC Assembly

Coverage of the GSA Memory Conference continues in this week's issue of Chip Scale Review Tech Monthly. Francoise von Trapp contributed this article. While there continue to be incremental improvements and innovations in single chip packaging technologies, it’s nothing compared to the focus on multi-chip assembly and packaging technologies. Whether they’re called systems-in-package (SiP), mul... »

Back by Popular Demand

Once again, I can’t let my follow-up coverage of SEMICON West go by without reporting on my annual briefing with Manish Ranjan, of Ultratech. This year I even got a gift! It was little rubber-like replica of the company’s latest lithography tool that encased a 4G flash drive.  (Those little suckers just keep getting smaller, denser, and cheaper, don’t they? This Staples commercial advertise... »