As chip-to-wafer (C2W) stacking has been identified by most technologists as the best approach to 3D stacking for optimum yields and the ability to stack dies of different sizes — especially in memory/logic stacks — a number of approaches have been or are being developed by various collaboratives. At IMAPS Device Packaging, held March 8-10, 2011 in Scottsdale AZ, two approaches were presente... »
CEA-Leti and IPDiA have formed a common lab to capitalize on their complementary expertise in miniaturization and 3D integration on silicon. The common lab is dedicated to developing new 3D-integration technologies for passive electronics components on silicon and will open the door to new applications in promising markets such as LED lighting, healthcare and aerospace that require extreme miniat... »
I have to admit, after the first day of IMAPS Device Packaging Conference last week, I was thinking, “Well, that was a good recap of what’s been going on in 3D for the past 8 years.” Other than some ongoing process tweaking to improve yields and cost issues, I wasn’t exactly hearing anything new (at least not to me). But then I caught the undercurrent of building enthusiasm despite remaini... »
There’s nothing like a natural disaster to remind us of how delicate the balance is between life and death, and how all the advanced technology available to us couldn’t stop a wall of water from annihilating everything in its path in a matter of moments. In this era of technological innovation, we tend to think everything can be solved through research, invention, development, and engineering. »
Earlier this week Invensas Corporation, a wholly-owned subsidiary of Tessera Technologies, Inc., announced both its acquisition of ALLVIA’s patent assets, and a two-year collaborative partnership with ALLVIA to further develop technology and intellectual property (IP) in the 3-dimensional integrated circuit (3D-IC) packaging space. This strategic alliance is expected to optimize the strengths ... »
Rudolph Technologies, Inc., provider of process characterization equipment and software for the semiconductor, solar and LED industries, announced today that it has shipped its Wafer Scanner™ 3880 3D Inspection System, multiple NSX® Macro Defect Inspection Systems and its Discover® Yield Management Software Suite to a leading semiconductor manufacturer for use in developing through silicon via »
I got an email last week from R. Colin Johnson, of EE Times, looking for my impression on the collaboration between IBM and 3M, and their announcement to begin development of an adhesive material that would allow building “silicon towers” or “silicon bricks” that would be 100 chips high. Johnson wanted to know my thoughts on this, could 3M’s thermally conductive adhesive really be, as th... »
SPP Process Technology Systems (SPTS), manufacturer of plasma etch, deposition, and thermal processing equipment for the semiconductor industry today has ompleted the transfer of ownership of Primaxx Inc. from SPTS’ parent company, Sumitomo Precision Products (SPP) to SPTS in December 2010. The transfer strengthens SPTS’ etch technology portfolio that includes deep silicon etch, dielectric etc... »
SPP Process Technology Systems (SPTS) has shipped an APS etch system to Fraunhofer ISIT (FhG-ISIT). The system will add new process capability to ISIT’s MEMS manufacturing line to fuel next-generation development of devices such as actuators, sensors and energy harvesters. “We have chosen to add APS to extend our offerings to the full range of deep etch processing for all MEMS and related te... »
Site Design By
Recent Comments