Archives January 2011 - 3D InCites

Leti’s 300mm 3D Launch Party

Last week (January 18 and 19, 2011), Leti lit up Grenoble, France with the inauguration of its 300mm 3D integration, christening the region as “The Grenoble Valley ecosystem for 3D Integration.” The two-day event brought together Leti’s 3D common lab partners, spanning the supply chain to include industry partners (ST Microelectronics and ST Ericsson), equipment manufacturers (SPTS, EV Group... »

CEA-Leti and SHINKO Sign Common-Lab Agreement

In a move that promises to provide increased performance and smaller size for portable electronics and other advanced systems, CEA-Leti has signed a multiyear agreement with SHINKO Electric Industries, Co. Ltd. (“SHINKO”) to develop advanced semiconductor packaging technology. The work, which will be part of Leti’s broader efforts in advanced silicon substrates, will focus on silicon interp... »

Rudolph Technologies Collaborates in 3D Advanced Packaging Integration

Rudolph Technologies, Inc., provider of process characterization equipment and software for wafer fabs and advanced packaging facilities announced  that it will collaborate with a process tool supplier and an IC device manufacturer in the development of 3D advanced semiconductor packaging applications. The development effort involves the integration of defect inspection with a de-bonding tool.  »

CEA-Leti Ramps up 300mm Line Dedicated to 3D-Integration Applications

Grenoble-based research institute, CEA-Leti, will significantly expand its technology offering this month when it ramps up one of Europe’s first 300mm lines dedicated to 3D-integration applications.By adding this technology to its existing 300mm CMOS R&D line, Leti now can offer heterogeneous integration technologies to customers on both 200mm and 300mm wafers. The new line, dedicated to R... »

2011: Closing in on 3D Commercialization

It looks like it’s all starting to come together. 2010 closed out with promising news for 3D ICs and TSV technology. At SEMI’s Industry Strategy Symposium (ISS) this week in Half Moon Bay, CA, this news was reiterated by industry executives. (Unfortunately, I didn’t attend, but I’ve been reading about it everywhere.) Wide I/O DRAM was identified as the volume driver for 3D TSVs (Ok, we alr... »

Invensas Acquires ALLVIA 3D-IC Packaging Technology

Invensas Corporation, a wholly owned subsidiary of Tessera Technologies, Inc. , announced today that it has acquired the patent assets of ALLVIA, Inc. In addition, Invensas has entered into a two-year collaborative partnership with ALLVIA to further develop technology and intellectual property (IP) in the 3-dimensional integrated circuit (3D-IC) packaging space. ... »

EV Group Teams with Industrial Technology Research Institute (ITRI) on Advanced MEMS Research and Development

ST. FLORIAN, Austria, June 1, 2011 – EV Group (EVG), a leading supplier of wafer bonding and lithography equipment for the MEMS, nanotechnology and semiconductor markets, today announced that it is collaborating with the Industrial Technology Research Institute (ITRI)—Taiwan’s largest and one of the world’s leading high-tech R&D institutions—in the development of advanced manufactur... »

Elephants, Bunnies, and Sandwiches: A Few Favorite Things from the GSA Memory Conference

Symbolism and analogies were flying fast and furious yesterday at the GSA Memory Conference in San Jose, CA. which addressed 3D Architecture with Logic & Memory Integrated Solutions. I always appreciate when technologists show their senses of humor. It makes an otherwise dry topic lots more interesting to write about. ASE’s Bill Chen is clearly a gourmet, because his analogies focus on foo... »

Will 3D Integration Keep 2nd Tier Foundries Alive?

Last week, I was reading a press release on iSuppli's website titled, And Then There Were Three: Ranks of Leading-Edge Chip Foundries Dwindle and I got to thinking, if only 3 major foundries (TSMC, GlobalFoundries, and Samsung) are going to be able to handle the cost of high volume, leading-edge  semiconductor process technologies at the 22- to 20-nanometer (nm) level by the end of 2011, what are »