Archives April 2009 - 3D InCites

The post-fab process debate for 3D ICs: foundry or OSATS

Inquiring minds want to know: who is going step forward and claim ownership of post-fab processes for 3D IC stacking using through-silicon vias (TSVs)? This has been a topic of debate for some time, with no real solution, although plenty of reasons why one or the other is the way to go, depending on who you talk to. Here's my understanding of the situation. »

SPP/SPTS ships 300mm DRIE tool to CEA-LETI

SPP Process Technology Systems (SPTS) and its parent company Sumitomo Precision Products Co., Ltd (SPP),developers of plasma process technologies for manufacturing micro-electro mechanical systems (MEMS) and advanced semiconductor devices, today announc »

Old World to New World in under 5 minutes

I just got back from a stroll from the Begijnhof Congres Hotel to the Grote Markt (Great Market Square) in Leuven, Belgium’s city centre and back. To get to the city center, I walked the ancient cobblestone streets through Groot Begijnhof Leuven, a community for unmarried, semi-religious women thought to be established in the 1205. »

Live, from Dobson Ranch, it’s MEPTEC’s Southwest Luncheon

While I’m clearly a huge believer of leveraging the Internet for interactive communication (heck, 3D InCItes was founded on that) I have to admit that there’s still no substitute for human interaction. Attending yesterday’s MEPTEC Southwest Luncheon, featuring Mark Stromberg from Gartner Dataquest, offered more than just an update on the back-end markets, which will be officially released ... »

IWLPC to feature five half-day tutorials

The SMTA and Chip Scale Review magazine are pleased to announce five half-day tutorials for the 6th Annual International Wafer-Level Packaging Conference, held  October 27-30, 2009 at the Santa Clara Marriott Hotel in Santa Clara, California. The IWLPC tutorials are application oriented and structured to combine field experience with scientific research to solve everyday problems. They are off... »

6th annual IWLPC program set

The SMTA, in conjunction with Chip Scale Review magazine, is pleased to announce the program for our 6th Annual International Wafer-Level Packaging Conference (IWLPC). Full details on the technical sessions, panel discussions and special events can be found at: »

3D from all angles at DATE 2009 3D workshop

As I was unable to attend Design Automation Test in Europe (DATE 2009) myself, but felt the information being shared there would be useful to my readers, I asked fellow 3D enthusiast, Yann Guillou, new technology marketing, St Ericsson, if he would write a guest post for “Françoise in 3D”. He graciously agreed, and what follows is his coverage of the event. -- F.v.T »

ALLVIA – A TSV Success Story

Is ALLVIA ahead of the pack? While the rest of us wonder when through silicon via (TSV) will be ready for market adoption, a small Sunnyvale-based company, ALLVIA, has been chugging right along for the past five years, manufacturing TSVs for a variety of applications like advanced vertical interconnect, silicon interposers for system-in-package, and MEMS sensors. For the past 3 years, they’ve ev... »