Rudolph Technologies’ Metrology, Inspection and Lithography Solutions for 2.5D and 3D TSVs
Here’s one thing the team at Rudolph has a firm grasp on: understanding that feature sizes of today’s wafer-level, 2.5D and 3D packaging technologies are changing the requirements for manufacturing tools in the back-end, and in many cases the back-end tools of today are starting to resemble the front-end tools...
Probing Questions at the IEEE 3D IC Test Workshop
As this year’s 3D IC Test Workshop unfolded (September 12 & 13, 2012), one thing became increasingly clear to me: the challenge of probing microbumps is an item of critical concern in 3D test. During the panel discussion on test requirements for 3D ICs, Saman Adham of TSMC Canada, noted...
Multitest’s Next Phase: An Interview with Reinhart Richter
This past July, I visited Multitest’s San Jose location to learn about the company’s activities in 3D IC test, as well as gain a better understanding of the company’s Plug & Yield™ philosophy, which spans handler, contactor and load board technologies. Earlier this month, the company announced its acquisition by...
Multitest: Handling the Mobility Market
What better way to wrap up a busy week at SEMICON West 2013 than a site visit? After three days of interviews and PowerPoints, I was ready for some some hands-on demonstration. Barbara Loferer, marketing manager of Multitest, was concluding an open-house week at the company’s San Jose facility to promote...
FormFactor Tackles Probe Test for 3D ICs
This is part of a series of short interviews, based on face-to-face meetings at SEMICON West 2013. For a long time, the jury was out on the probe-ability of micro-bumped TSV wafers. The jury was also unsure whether or not there was any point to probing to ensure known good...
NORDSON: Newcomers to 3D ICs
This is part of a series of short interviews, based on face-to-face meetings at SEMICON West 2013. As 3D ICs get closer to volume manufacturing, we’re seeing newcomers joining the 3D IC party with solutions that help along established process flows, and fill in gaps. Longtime suppliers to the mainstream...
Late Breaking SEMICON West News: Expert TechHUBs Added to this Year’s Agenda
New this year at SEMICON West, and just introduced to the program late last week, the Expert TechHUBs will help attendees find answers to specific semiconductor test and packaging questions. Meet with industry experts in an informal discussion group on the North Hall show floor at TechHUB Test or in...
Momentum Builds for the 2013 3D InCites Awards
Subscribers are practically blowing up 3D InCites as they duke it out online and race the July 3rd deadline for casting their ballots in the public opinion poll for this inaugural 3D InCites Awards; which is great because the first 3D InCites Awards Breakfast, co-presented by 3D InCites and TechSearch...
FormFactor: NanoPierce Contactor
Product Description FormFactor’s NanoPierce™ contactor is a socket solution for direct testing of TSVs and micro-bump arrays for 3D IC integration. A disruptive test technology designed specifically for TSV applications, it is being used by semiconductor manufacturers in their TSV development programs. The technology was honored earlier this year at...
Metryx: Mentor Mass Metrology Tool
Product Description Mass metrology is the measurement of the mass change on a wafer as a result of a wafer processing step. Mass metrology enables inline measurement on product wafers, enabling an increase in test coverage with high throughput. Mass as an SPC response has been adopted by 200mm and...
ECTC 2013 Interview: Multitest Execs Tout Partial Stack Test for 3D ICs
Those of us following 2.5D and 3D ICs have been holding our breath waiting for test solutions to appear amidst all the controversy surrounding whether or not partial testing of 3DICs just adds cost or whether it adds value. I spent some time talking to Bob Chartrand, director of sales...
A Lull in 3D Activity or Stealth Mode?
An industry colleague commented to me recently that the press seems to have lost interest in 3DIC. As probably the industry’s most avid follower and writer of 3D related news, I had to disagree – its not that we’ve lost interest, its just that there seems to be a lull...
Interconnectologists and Market Analysts See Eye to Eye on The Changing IC Industry at BiTS Workshop
Every year in early March, I spend a day at the BiTS Workshop (Burn-in Test Strategies), not because it’s a hotbed of 3D technology information (although this year there were some papers addressing 3D test as solutions are now becoming available) but because I’ve been working with the General Chair, Fred...
2013 Predictions for 3D ICs as reported by SPN
While most of the semiconductor trade publications wrapped up their 2013 prediction posts by mid January, Semiconductor Packaging News (SPN) forged on with its original annual Viewpoints series right up until last week. I spent some time pouring over the musings of industry executives’ contributions. Many discuss the proliferation of mobile...
European 3D TSV Summit Interview: Gilles Fresquet
Fogale Nanotech has been on my radar with its 3D TSV metrology solutions ever since I noticed their booth last summer at SEMICON West. Sometimes it takes an occasion such as a pre-arranged interview at the European 3D TSV Summit for a connection to finally take place. I was happy...
“Known Good Die” has a new name
After 20 years of chasing elusive Known Good Die (KGD) to achieve high yielding advanced interconnect technologies, the semiconductor industry has come to the conclusion that its time to take a different approach. It’s called Probably Good Die, and when it comes to 2.5D and 3D ICs, particularly for Memory,...
3D Technology Features in Review
The latest digital issues of Chip Scale Review and iMicronews’ 3D Packaging magazines hit the virtual “stands” last week, and perhaps in honor if the 3D ASIP Conference that gets underway later this week, there are some hot new 3D technologies being featured. But first, to bring everyone up to...
3D IC Educational Opportunities
If you have an hour of professional development time coming to you, I advise that you spend it watching this webinar on TSV and Interposer: modeling, design and characterization, presented by Darryl Kostka, of Computer Simulation Technology (CST). But don’t just take my word for it! It comes highly recommended...
The Stacked Die Reality Check Continues; FPGAs Lead the 3D Charge
It’s been one of those Mondays. I started making the coffee this morning (put in a clean filter, poured in the water) before I got sidetracked and hit the shower without ever putting in the grounds or turning it on. Then I left the Impress Labs office without my key...
Apple iPhone 5 Teardown; More on FinFets; Thoughts on 3D Test; (and some Friday Fun at the End)
Somehow the social media “shares” on Friday are more lighthearted than the rest of the week. Today, all the excitement was divided up between the iPhone 5 teardown and the last flight of the spaceshuttle Endeavor, as it toured its way up the California coastline riding piggyback on a 747....