Processes and Technology

Heterointegration Spoor in the 2015 Analog, MEMS and Sensor Startups to Watch, Part 3
Tube Amp Image NextImage ForceTouch Image 2 Merus Audio Logo Image rcj_Vesper_MEMS_Microphone_package

Heterointegration Spoor in the 2015 Analog, MEMS and Sensor Startups to Watch, Part 3

In Parts 1 and 2 of this series, I drew your attention to what Peter Clarke, writing in EETimes on 02 January 2015, called the “15-in-15: Analog, MEMS and sensor startups to watch in 2015.” If we were to look for heterointegration spoor amongst Peter’s 15 notable startups what would we find? The first “10-in-15” companies profiled in Parts 1 and 2, namely Cambridge CMOS Sensors; Chirp Mi... »

Executive Viewpoint: Invensas Opens its Toolbox of Interconnect Options
70EFB297-E68C-4726-850D-FB7E324BB93B InvensasBVA3_0

Executive Viewpoint: Invensas Opens its Toolbox of Interconnect Options

We’ve heard it expressed many times whenever there’s a new interconnect technology vying for adoption: manufacturers will select the best performing option at the lowest cost to do the job. However, as performance requirements reach previously un-anticipated levels, pitch requirements become tighter, and density requirements become higher, the job of the packaging engineer to provide increased... »

2013 ITRS Roadmap Calls for 3D Power Scaling; Monolithic 3D Gains Traction
11235297_s

2013 ITRS Roadmap Calls for 3D Power Scaling; Monolithic 3D Gains Traction

At the beginning of April, the Semiconductor Industry Association released the 2013 International Roadmap for Semiconductors (ITRS), which has traditionally served as a guide for “assessing and improving the future of semiconductor technology,” according to Brian Toohey, president and CEO, Semiconductor Industry Association. Sponsored by five regions of the world including Europe, Japan, Korea... »

Latest Developments in Cleans for TSVs and Cu Bumps
50micronbump

Latest Developments in Cleans for TSVs and Cu Bumps

At IMAPS DPC 2014, which took place March 11-13, 2014, in Fountain Hills, AZ, there were several presentations focused on new developments in cleans for TSVs and Cu bumps for 2.5D and 3D IC processes. Cleans has become increasingly important as bump pitches are reduced and TSVs have higher aspect ratios. It’s not just about being clean enough, but also about surface preparation for the next proc... »

TCI for Wireless Chip Stacking; Progress for Monolithic 3D

TCI for Wireless Chip Stacking; Progress for Monolithic 3D

Every once in a while, it’s important to remember that through silicon vias (TSVs) might not be the only game in town. While many continue to forge ahead, with commercialization so close we can taste it, others are already moving on to the next thing or looking for alternatives. Will these beat TSVs to the finish line? Not likely, considering this industry’s slow-to-adopt culture. But it’s s... »

Page 1 of 19123»